This invention relates to semiconductor integrated circuit devices, most generally, and the processes for forming these devices. More specifically, this invention relates to a dielectric film structure having trap sites passivated with deuterium and encapsulated beneath a barrier film. The dielectric film structure has an enhanced immunity to hot carrier aging effects.
Semiconductor integrated circuit devices include a thin dielectric film, commonly a thermally grown oxide, which functions as a gate dielectric for transistors which are formed within the semiconductor substrate and incorporated into semiconductor integrated circuit devices. The gate dielectric film is typically formed on the semiconductor substrate over a region within the substrate which will serve as a channel region of a transistor, and beneath a subsequently formed gate electrode. A thin interface region forms the boundary between the gate dielectric film and the substrate surface. The transistors function when the channel region formed in the semiconductor substrate is biased to allow a current to flow from a source region to a drain region by way of the channel region. A gate voltage applied to the gate electrode disposed atop the gate dielectric film provides the necessary bias. When the applied gate voltage exceeds the threshold voltage (Vt) of the transistor, current flows laterally from the source region to the drain region through the channel region, and the transistor is turned xe2x80x9cONxe2x80x9d.
The quality and integrity of the gate dielectric film is critical to the functionality of the transistor devices which include a very tightly defined set of operational characteristics which, in turn, are very sensitive to the characteristics of the materials and process operations used to form the transistor devices. It is important, therefore, to maintain the operational characteristics of the gate dielectric film, and specifically, to suppress any changes associated with the fixed electrical charge of a gate dielectric film and the interface region formed between the gate dielectric film and the underlying substrate surface.
A thermally grown oxide film, commonly used as a gate dielectric material in the semiconductor processing industry, carries with it an electrical chargexe2x80x94called a fixed oxide charge. This fixed oxide charge influences the threshold voltage required for turning on a transistor device. If the charge associated with the gate oxide film changes in time, so, too, will the actual threshold voltage which must be applied to turn on the transistor. When the threshold voltage changes in time due to a change in the fixed oxide charge, or when the actual threshold voltage of a manufactured transistor device differs from the targeted threshold voltage due to unanticipated charge characteristics of the oxide film, device functionality is destroyed. Therefore, it is of critical importance to suppress the addition of any trapped electrical charges which alter the operational characteristics, specifically, the charge characteristics of the film.
In the semiconductor manufacturing industry, the gate dielectric film is typically an oxide film thermally grown on a silicon substrate to form a silicon dioxide (SiO2) film, hereinafter referred to as an xe2x80x9coxidexe2x80x9d film. Defects such as impurities and dangling or broken bonds within the oxide film form trap sites, or xe2x80x9ctrapsxe2x80x9d. Traps within a gate oxide film can exist at the gate electrode/oxide interface, the bulk oxide film, or the oxide/substrate interface. Interface traps located at the oxide/substrate interface are especially prevalent. This is so, because, during the formation of the gate oxide film, a transition region forms between the crystalline silicon and the amorphous gate oxide. As a result, the transition region (the oxide/substrate interface) includes many incompletely bonded species which constitute trap sites.
These trap sites are usually uncharged, but can become charged when electrons and holes are introduced into the oxide and become trapped at the trap site. One way that traps become charged is by avalanche injection of highly energetic electrons or holes into the oxide. These highly energetic electrons or holes are commonly called xe2x80x9chot carriersxe2x80x9d. Trap sites are commonly xe2x80x9cpassivatedxe2x80x9d by a passivation species which complexes with, and occupies, the trap sites and makes the sites resistant to being occupied by the hot carriers. Highly energized hot carriers, however, can displace or xe2x80x9cknock outxe2x80x9d the passivation species from the trap site.
Hot carriers develop and become injected into trap sites existing in oxide films as a result of at least three effects: i) subsequent processing operations such as plasma processes can produce hot carriers, ii) the oxide film is exposed to radiation environments which produce hot carriers, and iii) during device operation, the electric field created by applying voltages to the device can create hot carriers.
Several processing operations commonly used in the fabrication of semiconductor devices produce radiation environments which result in radiation damage to the oxide film as above. Among such commonly used processing operations are included: e-beam evaporation; sputtering; plasma-enhanced chemical vapor deposition (PECVD); plasma etching; ion implantation; and direct write e-beam and x-ray lithography. It can be seen that these processing operations result in the production of hot carriers which become trapped in unoccupied trap sites or which replace passivation species from occupied trap sites and which add a trapped charge to the dielectric film. The trapped charge contributes to the fixed oxide charge and changes the operating characteristics, specifically the threshold voltage (i.e. the voltage necessary to turn xe2x80x9conxe2x80x9d a transistor), of a semiconductor integrated circuit device.
Additionally, hot carriers may be injected into unoccupied or passivated trap sites within the oxide or interface region after complete formation of the semiconductor device. This can occur due to the semiconductor device being operated in a radiation environment, or from highly energetic particles such as gamma-rays from space, which can enter the oxide and become trapped at the trap sites. More commonly, hot carrier injection occurs during device operation due to the electric field created as a result of voltages being applied to a device during operation. When this occurs in time and gradually degrades the device and decreases the lifetime of the device by changing the operational characteristics in time, it is known as hot carrier aging.
The conventional method for making a semiconductor device immune to hot carrier effects, is to xe2x80x9cpassivatexe2x80x9d the trapped sites within the oxide film. Alternatively stated, the lifetime of a device (the time before hot carrier degradation destroys device performance), can be increased by minimizing and/or reducing the number of trap sites in the gate oxide by passivating them. In essence, this reduces the density of unoccupied trap sites available which injected hot carriers may occupy. The trap sites may be passivated by annealing in a passivating species such as hydrogen, at relatively high temperatures. The hydrogen diffuses into the oxide film and occupies the trap sites by complexing with the dangling bonds or impurities which form the trap site.
Occupied by a passivating species such as hydrogen, the trap sites are no longer open to trap charged hot carriers. Energized hot carriers, however, can displace or xe2x80x9cknock outxe2x80x9d a passivating species from a passivated, or occupied, site. The energized hot carriers are often produced during device operation as a result of the voltages applied to the device. Most commonly, during device operation, energized hot carriers travel laterally from the source or drain regions of a transistor and into the oxide/substrate interface in the channel region, thereby knocking out a passivating species from a passivated trap site. This can destroy device performance. As such, it is desirable to passivate trap sites with a passivating species which is resistant to being displaced by a hot carrier.
It has been found recently that deuterium (D2) is a passivating species which is far superior to hydrogen (H2). Deuterium has been found to be more effective in occupying, and remaining in, trap sites within an oxide film, thereby more effectively preventing hot carriers from becoming trapped at the trap sites and increasing the fixed oxide charge. Deuterium enjoys this advantage, in part because of its relatively large molecular size compared to hydrogen. Once deuterium has been introduced to a trap site thereby passivating the site, it is less susceptible to being xe2x80x9cknocked outxe2x80x9d by subsequently formed, energized hot carriers. In this manner, deuterium increases device immunity to hot carrier effects and extends the lifetime of a device. Deuterium has been known to improve the lifetime of a device by an order of magnitude with respect to hydrogen.
Using conventional processing techniques, passivation annealing typically occurs at a temperature in excess of 800xc2x0 C. This high temperature accelerates the diffusion of the passivating species throughout the device and allows for maximum passivation of trapped sites by the passivating species. After metal films which will form the metal wiring pattern, have been added to the device, however, annealing at temperatures exceeding 400xc2x0-450xc2x0 C. is not practical. The aluminum alloys and copper alloys commonly used as metal films, melt at temperatures greater than about 400xc2x0-450xc2x0 C., depending on the specific composition of the alloy used. A shortcoming of the conventional processing sequence used to fabricate a semiconductor device, is that several processing operations are performed on the semiconductor device subsequent to the addition of the metal film. Many of the subsequent operations such as plasma-enhanced CVD, reactive ion etching, and sputter deposition used to form the metal film, produce hot carriers and cause these hot carriers to be trapped within the trap sites either by occupying available trap sites or by knocking out a passivation species which is occupying the trap site. For the foregoing reasons, it is especially important to passivate as many traps as possible prior to the introduction of the metal film, in order to prevent hot carrier injection into the traps during the metal deposition process and processes subsequent to the introduction of the metal film. It is also important to passivate the trap sites with a species which is resistant to being displaced by a subsequently energized hot carrier, such as produced during device operation.
An additional passivation anneal process is generally carried out after the complete fabrication of the device because of the following considerations: previously passivated trap sites may become xe2x80x9cde-passivatedxe2x80x9d when subsequent high temperature processes urge the diffusion of the passivation species away from passivated trap sites; previously passivated trap sites may become de-passivated by an energized hot carrier created during subsequent processing operations (as above), and because it is desirable to maximize the number of sites passivated because hot carriers may form as a result of device operation and because hot carriers are present in space and in the working environment of the functional semiconductor device.
When the passivation anneal process is carried out after device fabrication is completed and after the addition of metal films to the device, it must necessarily be carried out at a temperature no greater than 400xc2x0-450xc2x0 C. Since it is necessary to ensure that all trap sites, including oxide trap sites within a gate oxide film disposed under several layers of superjacent films, must also be passivated, it can be seen that the passivation anneal process carried out at a low temperature takes a considerable amount of time. This is especially true for deuterium. The extended time is necessary to allow for the diffusion of the passivating species from the atmosphere above the substrate, through several superjacent layers, and down to the gate oxide film. While higher passivation anneal temperatures may allow for a shorter passivation anneal time, temperatures greater than 400-450xc2x0 C. create other device defects. As such, this is a time consuming process, and it is desirable to completely and permanently passivate as many sites as possible prior to a post-processing passivation operation.
It can be seen that a passivation anneal process which uses a superior passivating agentxe2x80x94deuterium, which effectively passivates a maximum number of trap sites and which is less likely to be displaced by thermal processing or by a subsequently formed hot carrier, and which further reduces process time for the post-passivated anneal, is needed in the art. Furthermore, a structure having permanently passivated trap sites resistant to being displaced by the above methods, is also needed in the art.
The present invention addresses the shortcomings of the conventional art by providing a semiconductor device having a dielectric film structure including an oxide film and an interface region. Trap sites within the oxide film and the interface region are passivated with deuterium. The region including the passivated trap sites is encapsulated beneath a barrier film which is chosen to be impervious to deuterium. The encapsulated deuterium is resistant to diffusing away from the trap sites during high temperature process operations and the passivated device has an enhanced immunity to hot carrier effects.